AArch64 MP+dmb.sy+pos-ctrl-addr-[ws-rf]-ctrl
"DMB.SYdWW Rfe PosRR DpCtrldR DpAddrdW WsLeave RfBack DpCtrldR Fre"
Cycle=Rfe PosRR DpCtrldR DpAddrdW WsLeave RfBack DpCtrldR Fre DMB.SYdWW
Relax=
Safe=Rfe Fre PosRR DMB.SYdWW DpAddrdW DpCtrldR [WsLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe PosRR DpCtrldR DpAddrdW WsLeave RfBack DpCtrldR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=z; 1:X7=a; 1:X10=x;
2:X1=a;
}
P0 | P1 | P2 ;
MOV W0,#1 | LDR W0,[X1] | MOV W0,#2 ;
STR W0,[X1] | LDR W2,[X1] | STR W0,[X1] ;
DMB SY | CBNZ W2,LC00 | ;
MOV W2,#1 | LC00: | ;
STR W2,[X3] | LDR W3,[X4] | ;
| EOR W5,W3,W3 | ;
| MOV W6,#1 | ;
| STR W6,[X7,W5,SXTW] | ;
| LDR W8,[X7] | ;
| CBNZ W8,LC01 | ;
| LC01: | ;
| LDR W9,[X10] | ;
Observed
y=1; x=1; a=2; 1:X9=1; 1:X8=1; 1:X2=0; 1:X0=1;
and y=1; x=1; a=1; 1:X9=1; 1:X8=1; 1:X2=0; 1:X0=1;